1. Technical Field
Embodiment described herein relate to a wiring substrate, a method of manufacturing the wiring substrate, and a semiconductor device.
2. Related Art
In the past, there has been a wiring substrate on which a semiconductor chip and the like are mounted. In an example of such a wiring substrate, multilayered build-up wiring is formed on both surfaces of a core substrate including through electrodes. Further, solder bumps of a semiconductor chip are flip-chip connected to connection pads, which are formed on one surface of the wiring substrate, by reflow heating (see e.g., JP-A-2004-47667 and JP-A-2005-86071).
As described in the section of preliminary content to be described below, the coefficient of thermal expansion of a wiring substrate where build-up wiring layers are formed on both surfaces of a core substrate is considerably larger than that of a semiconductor chip (silicon) to be mounted. Accordingly, the wiring substrate is apt to expand or warp more than the semiconductor chip due to the reflow heating that is performed when the semiconductor chip is mounted.
For this reason, particularly, if connection bumps of the semiconductor chip narrow, the connection pads of the wiring substrate are disposed to be shifted from the connection bumps of the semiconductor chip when the semiconductor chip is mounted. Accordingly, it is difficult to reliably mount the semiconductor chip.